As is known in the art, large host computer systems require large capacity data storage systems. These large computer systems generally include data processors which perform many operations on data introduced to the computer system through peripherals including the data storage system. The results of these operations are output to peripherals, including the storage system.
One type of data storage system is a magnetic disk storage system. Here a bank of disk drives and the computer system are coupled together through an interface. The interface includes “front end”, directors (or controllers) and “back end” disk directors (or controllers). The interface operates the directors in such a way that they are transparent to the computer. That is, data is stored in, and retrieved from, the bank of disk drives in such a way that the computer system merely thinks it is operating with one large memory. One such system is described in U.S. Pat. No. 5,206,939, entitled “System and Method for Disk Mapping and Data Retrieval”, inventors Moshe Yanai, Natan Vishlitzky, Bruno Alterescu and Daniel Castel, issued Apr. 27, 1993, and assigned to the same assignee as the present invention.
As described in such U.S. Patent, the interface may also include, in addition to the front-end directors and disk directors, an addressable global cache memory. The global cache memory is a semiconductor memory connected to all of the front end directors and back end directors and is provided to rapidly store data from the computer system before storage in the disk drives, and, on the other hand, store data from the disk drives prior to being sent to the computer. The cache memory being a semiconductor memory, as distinguished from a magnetic memory as in the case of the disk drives, is much faster than the disk drives in reading and writing data.
In operation, when the host computer wishes to store end-user (i.e., host computer) data at an address, the host computer issues a write request to one of the front-end directors to perform a write command. One of the front-end directors replies to the request and asks the host computer for the data. After the request has passed to the requesting one of the front-end directors, the director determines the size of the end-user data and reserves space in the cache memory to store the request. The front-end director then produces control signals for such front-end director. The host computer then transfers the data to the front-end director. The front-end director then advises the host computer that the transfer is complete. The front-end director looks up in a Table, not shown, stored in the cache memory to determine which one of the rear-end directors is to handle this request. The Table maps the host computer address into an address in the bank of disk drives. The front-end director then puts a notification in a “mail box” (not shown and stored in the cache memory) for the rear-end director which is to handle the request, the amount of the data and the disk address for the data. Other rear-end directors poll the cache memory when they are idle to check their “mail boxes”. If the polled “mail box” indicates a transfer is to be made, the rear-end director processes the request, addresses the disk drive in the bank, reads the data from the cache memory and writes it into the addresses of a disk drive in the bank. When end-user data previously stored in the bank of disk drives is to be read from the disk drive and returned to the host computer, the interface system operates in a reciprocal manner. The internal operation of the interface (e.g. “mail-box polling”, event flags, data structures, device tables, queues, etc.) is controlled by interface state data (sometimes referred to as metadata) which passes between the directors through the cache memory. Further, end-user data is transferred through the interface as a series of multi-word transfers, or bursts. Each word transfer in a multi-word transfer is here, for example, 64 bits. Here, an end-user data transfer is made up of, for example, 32 bursts. Each interface state data word is a single word having, for example, 64 bits.
As is also known in the art, many systems of the type described above include two separate cache global memories for redundancy. Further, because these global cache memories are DRAM, or other volatile type memory, there is a need for a battery backup for the memories.
As is also known in the art, a new type of disk drive is expected to be available shortly. This new type of disk drive is a hybrid disk drive and includes a large-buffer computer hard drive (i.e., a magnetic storage-media) as well as large buffer (up to 1 GB) of non-volatile flash memory to cache data during normal use.